Conférence de l’IEEE IEDM 2018

The 64th annual IEEE International Electron Devices Meeting (IEDM) will take place at the San Francisco Union Square Hilton hotel from December 1-5, 2018.  At IEDM each year, the world’s best scientists and engineers in the field of micro/nanoelectronics gather to participate in a technical program consisting of some 230 presentations, along with a variety of panels, special sessions, Short Courses, a supplier exhibit, IEEE/EDS award presentations and other events highlighting leading work in more areas of the field than any other conference.

 

There is no embargo on pre-conference coverage.  IEDM 2018 details are given in the news release below and in the “tip sheet” of technology highlights is available online. You’ll also find many high-resolution images taken from highlighted papers, as well as the conference logo and a photo of San Francisco, at the IEDM Press Center, accessible via the “Press Kit” link on the IEDM website (http://ieee-iedm.org/press/) or directly at www.btbmarketing.com/iedm.

 

Here are some highlights of this year’s IEDM:

  • From the late-news papers – Progress toward 3nm CMOS technology (Samsung, #28.7) and ≤16nm DRAMs (Imec, #2.7).
  • Lots of talks describing innovative devices for artificial intelligence – see the tip sheet.
  • Intel integrates e-MRAM with 22nm FinFETs (#18.1)
  • Four Focus Sessions with invited papers from world experts on the topics of interconnects for continued scaling (Session #5), quantum computing devices (Session #6), 5G and beyond (Session #14), and wide-bandgap challenges for power electronics (Session #19).
  • Germanium channels for CMOS? (TSMC, #21.1)  Graphene interconnects for CMOS? (U.C.-Santa Barbara, #34.5)
  • Highest-density 3D stacked FinFETs (Imec, #7.1)
  • 3D Crosspoint storage-class memory (SK Hynix, #7.1)
  • Transistors are switches, right?  Well, what about other kinds of switches for ultra-low-power computing, such as nanomechanical relays? (U.C.-Berkeley, #4.1)

 

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